TLS Performance on the Infineon XMC7200 CRYPTO Unit

The XMC7200 has two Arm Cortex-M7 cores for primary processing and a Cortex-M0+ core for peripheral and security processing, with a CRYPTO unit for hardware acceleration. Having the unit on the die does not mean TLS is faster. The library has to actually use it, and the default configuration usually does not.

The documented result

TLS data stream performance on the XMC7200 CRYPTO unit was improved by +33 % over the vendor library, with full compatibility maintained. The measurement and the discussion are documented in the original post on the Infineon Developer Community:

https://community.infineon.com/t5/XMC/XMC7000-CRYPTO-unit-performance/td-p/1024565

Where the performance is actually lost

Hardware acceleration is not a switch you turn on. The measurable losses come from these places:

  • The library does not reach the unit. mbedTLS is a software implementation by default. Without an explicit acceleration layer, the CRYPTO unit sits idle while the CPU does the work.
  • Record size. Small TLS records multiply per-record overhead. Throughput is a function of record size as much as of crypto speed.
  • Handshake crypto vs. data crypto. The handshake is dominated by asymmetric operations; the data stream is dominated by symmetric ones. Accelerating the wrong one changes nothing measurable.
  • Cipher selection. ECC versus RSA changes the handshake cost by an order of magnitude. This is a design decision, not a runtime tuning knob.
  • Session resumption. Repeated connections without resumption pay the full handshake every time, which on an embedded link is often the dominant cost.
  • Buffer and alignment behaviour. DMA and buffer alignment on the peripheral path is where a hardware unit silently stops being used.

What this means for an architecture decision

On a constrained device, TLS performance is an architectural property, not a library setting. Record size, cipher choice, resumption strategy and the crypto path are decided at design time. Retrofitting them after the link is in production is what turns a performance question into a field problem.

FAQ

Is the CRYPTO unit faster than the CPU for every operation?

No. The gain depends on the operation and on block size. For some operations the software path is competitive, and the overhead of calling the unit can exceed the benefit.

Why does the vendor library show a lower number than the hardware is capable of?

Because the library's default path is the software path. The acceleration layer has to be explicitly integrated, and the integration has to match the buffer and record structure the application actually uses.

Does this apply outside the XMC7200?

The reasoning applies to any MCU with a crypto unit. The specific numbers do not transfer.

Related